2134/3789
Changqing Liu
Changqing
Liu
M.W. Hendriksen
M.W.
Hendriksen
David Hutt
David
Hutt
Paul Conway
Paul
Conway
David Whalley
David
Whalley
Materials and processes issues in fine pitch eutectic solder flip chip interconnection
Loughborough University
2008
Flip-chip
Shear Strength
Stencil Printing
Under Bump Metalization
Mechanical Engineering not elsewhere classified
2008-10-22 13:59:18
Journal contribution
https://repository.lboro.ac.uk/articles/journal_contribution/Materials_and_processes_issues_in_fine_pitch_eutectic_solder_flip_chip_interconnection/9574007
New product designs within the electronics packaging
industry continue to demand interconnects at shrinking geometry,
both at the integrated circuit and supporting circuit board substrate
level, thereby creating numerous manufacturing challenges.
Flip chip on board (FCOB) applications are currently being driven
by the need for reduced manufacturing costs and higher volume
robust production capability. One of today’s low cost FCOB solutions
has emerged as an extension of the existing infrastructure
for surface mount technology and combines an under bump metallization
(UBM) with a stencil printing solder bumping process, to
generate mechanically robust joint structures with low electrical
resistance between chip and board. Although electroless Ni plating
of the UBM, and stencil printing for solder paste deposition have
been widely used in commercial industrial applications, there still
exists a number of technical issues related to these materials and
processes as the joint geometry is further reduced. This paper reports
on trials with electroless Ni plating and stencil paste printing
and the correlation between process variables in the formation of
bumps and the shear strength of said bumps at different geometries.
The effect of precise control of tolerances in squeegees, stencils
and wafer fixtures was examined to enable the optimization of
the materials, processes, and tooling for reduction of bumping defects.