Polycrystalline+CdSeTe+CdTe+Absorber+Cells+with+28+mA+cm2+Short-Circuit+Current.pdf (681.39 kB)

Polycrystalline CdSeTe/CdTe absorber cells with 28 mA/cm2 short-circuit current

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conference contribution
posted on 16.11.2017, 09:31 by Amit Munshi, Jason M. Kephart, Ali Abbas, John Raguse, Jean-Nicolas Beaudry, Kurt L. Barth, James Sites, Michael Walls, Walajabad S. Sampath
An 800-nm CdSeTe layer was added to the CdTe absorber used in high-efficiency CdTe cells to increase the current and produce an increase in efficiency. The CdSeTe layer employed had a band gap near 1.41 eV, compared to 1.5 eV for CdTe. This lower band-gap allowed a current increase from approximately 26 to over 28 mA/cm2. Voltage same as earlier demonstrated high efficiency CdTe-only device was maintained. The fill-factor was not significantly affected. Improving the short-circuit current and maintaining the open-circuit voltage lead to device efficiency over 19%. QE implied that the approximately half the current was generated in the CdSeTe layer and half in the CdTe. Cross-section STEM and EDS showed good grain structure throughout and diffusion of Se into the CdTe layer was observed. To the best of authors’ knowledge this is the highest efficiency polycrystalline CdTe photovoltaic device demonstrated amongst universities and national labs.

Funding

The CSU authors thank support from NSF’s Accelerating Innovation Research, DOE’s SunShot and NSF’s Industry/University Cooperative Research Center programs. The Loughborough authors are grateful to EPSRC for funding through the Supergen SuperSolar Hub. Authors gratefully acknowledge help from 5N Plus for providing CdSeTe material for deposition.

History

School

  • Mechanical, Electrical and Manufacturing Engineering

Published in

44th IEEE Photovoltaics Specialist Conference (PVSC)

Citation

MUNSHI, A. ... et al, 2017. Polycrystalline CdSeTe/CdTe absorber cells with 28 mA/cm2 short-circuit current. Presented at the 2017 44th IEEE Photovoltaics Specialist Conference (PVSC), Washington, DC, USA, 25th-30th June 2017.

Publisher

IEEE

Version

AM (Accepted Manuscript)

Publication date

2017

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en

Location

Washington, DC USA

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