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Impact of parasitic and load current on the attenuation of motor terminal overvoltage in SiC-based drives

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journal contribution
posted on 11.01.2022, 15:14 by Wenzhi Zhou, Mohamed DiabMohamed Diab, Xibo Yuan
In SiC-based adjustable speed drives, the high voltage slew rate (𝒅𝒗/𝒅𝒕) of the switching transitions results in excessive overvoltage at the motor terminals due to the reflected voltages across the drive power cables. Besides the cable length, the switching rise/fall times of the voltage pulses are a key parameter to quantify the motor overvoltage in PWM inverter-fed drives. These times are varying depending on the load current and parasitic elements of SiC MOSFETs, that is, a standard two-level converter typically results in a non-uniform overvoltage envelop at the motor terminals. This article analyses the switching mechanism of the two-level converter considering the impact of SiC parasitic elements and load current showing how they affect the motor overvoltage in cable-fed drives. The analysis is then extended to the mitigation of the motor overvoltage using quasithree-level (Q3L) modulation as a candidate filter-less approach with a T-type converter. The theoretical analysis is validated through experimental tests by using the Q3L T-type converter. The analysis and results show that the instantaneous load current value critically determines the peak motor overvoltage, while it allows either a full or partial overvoltage mitigation when the Q3L modulation is adopted.


Insulation degradation and lifetime of inverter-fed machines with fast switching (high dv/dt) converters

Engineering and Physical Sciences Research Council

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  • Mechanical, Electrical and Manufacturing Engineering

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IEEE Transactions on Industry Applications


1 - 1


Institute of Electrical and Electronics Engineers (IEEE)


AM (Accepted Manuscript)

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Dr Mohamed Diab. Deposit date: 11 January 2022