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Scanning acoustic microscopy investigation of engineered flip-chip delamination

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posted on 07.11.2008, 16:58 authored by David HuttDavid Hutt, David Whalley, Patrick WebbPatrick Webb, K.C. Hung, C.W. Tang, Paul ConwayPaul Conway, U.C. Chan
The rapid uptake of flip-chip technology within the electronics industry, is placing the reliability of such assemblies under increasing scrutiny. A key feature of the assembly process is the application of underfill to reinforce the attachment of the die to the printed circuit board. This has been identified in numerous studies as one of the major ways in which the reliability of the devices can be improved, by mitigating the coefficient of thermal expansion mismatch between chip and board. However, in order for the underfill to be effective in coupling the die to the circuit board, its adhesion to the passivation layer of the die and the solder mask layer on the PCB must be maximised. There is a growing body of literature that indicates that poor adhesion at either interface (delamination) as a result of contamination can result in premature failure of the assembly through stress fracture of the solder joints. In order to investigate further the effect of delamination on the reliability of flip-chip assemblies, surface chemistry has been used to control the adhesion of the underfill to the die passivation. This paper reports how modification of the die surface by the application of a low surface energy coating, which prevents the strong adhesion of the underfill, has enabled the selective delamination of the device at the chip-to-underfill interface. Using scanning acoustic microscopy (SAM) the effectiveness of this treatment in creating controlled delamination before and after thermal cycling has been monitored. The ability to engineer delamination, can enable experimental studies of the mechanics of flip chip assembly failure, which complement current finite element modelling work.



  • Mechanical, Electrical and Manufacturing Engineering


HUTT, D.A....et al., 2000. Scanning acoustic microscopy investigation of engineered flip-chip delamination. IN: 26th IEEE/CPMT International Electronics Manufacturing Technology Symposium, 2-3 Oct, Santa Clara, California, pp. 191-199.



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