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Modelling and control of variability in PCB copper electroplating

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posted on 27.10.2010 by Ka-Kwai Poon
This thesis is concerned with the modelling and control of the acid copper electroplating process for the manufacturing of printed circuit boards (PCB). The objectives of this study were to investigate the effects of process and product parameters on the workpiece level uniformity during the acid copper plating of lithographic patterns, plated-through holes (PTH) and blind-via (BV), and to explore the minimization of the deposit thickness variation. The parameters studied were the average current density (ACD), plating duration, concentration of additive and sulphuric acid, electrode separation (ES), line width and active area density ratio (AADR) of the circuit pattern. The effects of the copper sulphate concentration, aspect ratio (CAR) and depth ratio were also studied for the PTH and BV plating. The results of the study enhance the understanding of the limitations of applying current distribution and statistical models to the copper electroplating of PCB at a workpiece level. Multifactor two-level factorial and the central composite rotatable five-level experiments were designed, and a total of fourteen sets of experiment were conducted sequentially and used to generate statistical process models. For the plating of uniform patterns, ACD, ES and their quadratic effects were found to be significant and a 6- term second order model was built and verified to predict and minimize the workpiece level variability. The existence of a minimum plating variability was attributed to the minimum deviation from the Faraday's nominal thickness observed under a particular combination of ACD and ES. For non-uniform patterns, ACD, AADR and the ACD x ES interaction were found significant and an 8-term first-order prediction model was constructed. The minimum variability achievable was found to increase with the AADR, and was explained by the scattering effect of AADR on the average plating thickness. Verification of the model with patterns of same AADR but different line width revealed the limitation of the continuum concept, i. e. AADR alone is not sufficient to characterize a non-uniformly patterned substrate. Subsequent verification runs using a simple circuit pattern showed further that a composite parameter involving the overall active area density, the continuum area and the number of AAD contrasts, was appropriate. For the PTH plating, ACD, CAR, ACD2 and the ACD x ES, ES x CAR interactions were found significant but only ES, ES2 and ACD x ES were active for BV plating. Second-order models were also developed for the two processes in their respective optimum regions and verified experimentally. The optimum values of ACD and ES, and the minimum variability achievable were found to increase with the corrected aspect ratio of the through-hole. Given the difference in the optimum regions of the PTH and BV plating, a new response surface of the PTH process was constructed at the optimum region of the BV process and vice versa. The process limiting the workpiece level uniformity under different combinations of ACD and ES was found by the intersections of these responses surfaces. Finally, process parameters limiting the simultaneous minimization of the plating variability of pattern, PTH and BV were discussed. It showed that under most situations, the workpiece level variability of BVs was higher than that of the PTHs.



  • Mechanical, Electrical and Manufacturing Engineering


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A Doctoral Thesis. Submitted in partial fulfillment of the requirements for the award of Doctor of Philosophy of Loughborough University.

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