Parallel scheduling of concurrent VLSI simulation modules onto a multiprocessor
thesisposted on 2017-10-26, 11:02 authored by Mohammad A. Rahin
The first of the two algorithms examined is the Concurrent Recursive Binary Partitioning (CRBP). This heuristic is based on Kernighan-Lin's graph bi-partitioning algorithm. An L-way partition is achieved by applying binary partitioning recursively, the procedure taking the form of a binary tree. In its parallel implementation each node of this tree is executed independently by a group of available processors and only the best among the solutions obtained is accepted. This provides enhanced processor utilisation and also assures improved results. The factors affecting the performance of the L-way partitioning heuristic at different stages are examined and their optimum values are investigated. [Continues.]
Association of Commonwealth Universities (Commonwealth Scholarships Programme).
- Mechanical, Electrical and Manufacturing Engineering
Publisher© M.A. Rahin
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NotesA Doctoral Thesis. Submitted in partial fulfilment of the requirements for the award of Doctor of Philosophy at Loughborough University.